document number: 91256 www.vishay.com s09-0007-rev. b, 19-jan-09 1 power mosfet irfps30n60k, sihfps30n60k vishay siliconix features ? low gate charge q g results in simple drive requirement ? improved gate, avalanche and dynamic dv/dt ruggedness ? fully characterized capacitance and avalanche voltage and current ? lead (pb)-free available applications ? switch mode power supply (smps) ? uninterruptible power supply ? high speed power switching notes a. repetitive rating; pulse width limi ted by maximum junction temperature. b. starting t j = 25 c, l = 1.1 mh, r g = 25 , i as = 30 a. c. i sd 30 a, di/dt 630 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. product summary v ds (v) 600 r ds(on) ( )v gs = 10 v 0.16 q g (max.) (nc) 220 q gs (nc) 64 q gd (nc) 110 configuration single n - c hannel m os fet g d s g d s super-247 tm a v aila b le rohs* compliant ordering information package super-247 tm lead (pb)-free IRFPS30N60KPBF sihfps30n60k-e3 snpb irfps30n60k sihfps30n60k absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 600 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 30 a t c = 100 c 19 pulsed drain current a i dm 120 linear derating factor 3.6 w/c single pulse avalanche energy b e as 520 mj repetitive avalanche current a i ar 30 a repetitive avalanche energy a e ar 45 mj maximum power dissipation t c = 25 c p d 450 w peak diode recovery dv/dt c dv/dt 13 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91256 2 s09-0007-rev. b, 19-jan-09 irfps30n60k, sihfps30n60k vishay siliconix note a. r th is measured at t j approximately 90 c. notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. c. c oss eff. is a fixed capacitance that gi ves the same charging time as c oss while v ds is rising from 0 to 80 % v ds . thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient a r thja -40 c/w case-to-sink, flat, greased surface r thcs 0.24 - maximum junction-to-case (drain) a r thjc -0.28 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 600 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma d -0.66-v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 3.0 - 5.0 v gate-source leakage i gss v gs = 30 v - - 100 na zero gate voltage drain current i dss v ds = 600 v, v gs = 0 v - - 50 a v ds = 480 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 18 a b - 0.16 0.19 forward transconductance g fs v ds = 50 v, i d = 18 a 16 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz - 5870 - pf output capacitance c oss - 530 - reverse transfer capacitance c rss -54- output capacitance c oss v gs = 0 v v ds = 1.0 v , f = 1.0 mhz - 6920 - v ds = 480 v , f = 1.0 mhz - 140 - effective output capacitance c oss eff. v ds = 0 v to 480 v c - 270 - total gate charge q g v gs = 10 v i d = 30 a, v ds = 480 v b - - 220 nc gate-source charge q gs --64 gate-drain charge q gd - - 110 turn-on delay time t d(on) v dd = 300 v, i d = 30 a, r g = 3.9 , v gs = 10 v b -29- ns rise time t r - 120 - turn-off delay time t d(off) -56- fall time t f -50- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --30 a pulsed diode forward current a i sm - - 120 body diode voltage v sd t j = 25 c, i s = 30 a, v gs = 0 v b --1.5v body diode reverse recovery time t rr t j = 25 c, i f = 30 a, di/dt = 100 a/s b - 640 960 ns body diode reverse recovery charge q rr -1116c body diode recovery current i rrm -31-a forward turn-on time t on intrinsic turn-on time is neglig ible (turn-on is dominated by l s and l d ) s d g
document number: 91256 www.vishay.com s09-0007-rev. b, 19-jan-09 3 irfps30n60k, sihfps30n60k vishay siliconix typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 5.0v 20s pulse width tj = 25c vgs top 15v 12v 10v 8.0v 7.0v 6.0v 5.5v bottom 5.0v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 5.0v 20s pulse width tj = 150c vgs top 15v 12v 10v 8.0v 7.0v 6.0v 5.5v bottom 5.0v 5.0 6.0 7.0 8.0 9.0 v gs , gate-to-source voltage (v) 0.1 1.0 10.0 100.0 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 150c v ds = 50v 20s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature (c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 30a
www.vishay.com document number: 91256 4 s09-0007-rev. b, 19-jan-09 irfps30n60k, sihfps30n60k vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 1000000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 04080120160200240 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 480v vds= 300v vds= 120v i d = 30a 0.20.40.60.81.01.21.4 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v 1 10 100 1000 10000 v ds ,drain - tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec
document number: 91256 www.vishay.com s09-0007-rev. b, 19-jan-09 5 irfps30n60k, sihfps30n60k vishay siliconix fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case 25 50 75 100 125 150 0 6 12 18 24 30 t , case temperature (c) i , drain current (a) c d p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
www.vishay.com document number: 91256 6 s09-0007-rev. b, 19-jan-09 irfps30n60k, sihfps30n60k vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 t p d.u.t l v ds + - v dd dri v er a 15 v 20 v i as v ds t p 25 50 75 100 125 150 0 200 400 600 800 1000 starting t j , junction temperature (c) e , single pulse avalanche energy (mj) as i d top bottom 13a 19a 30a q gs q gd q g v g charge 10 v d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + -
document number: 91256 www.vishay.com s09-0007-rev. b, 19-jan-09 7 irfps30n60k, sihfps30n60k vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91256 . p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices peak diode recovery dv/dt test circuit r g v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer
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